How does processor use stack?

Processor uses stack for saving registers or other data between switching of execution context. For architecture IA-32, IA-64 CPU uses stack in next instructions:

1. CALL and RET 

CALL instruction saves procedure related data on the stack and branches to the called procedure specified using the target operand. The target operand specifies the address of the first instruction in the called procedure. 

RET instruction transfers program control to a return address located on the top of the stack. The address is usually placed on the stack by a CALL instruction, and the return is made to the instruction that follows the CALL instruction.

2. ENTER and LEAVE
ENTER instruction creates a stack frame for a procedure.

LEAVE instruction releases the stack frame set up by an earlier ENTER instruction.

3. INT, INTO and IRET/IRETD

The INT n instruction generates a call to the interrupt or exception handler specified with the destination operand. INTO instruction is a shortcut for INT 4 instruction which means calling overflow exception handler.

IRET/IRETD instruction returns program control from an exception or interrupt handler to a program or procedure that was interrupted by an exception, an external interrupt, or a software-generated interrupt. These instructions are also used to perform a return from a nested task.

 

4. PUSH, PUSHA/PUSHAD, PUSHF/PUSHFD

PUSH instruction decrements the stack pointer and then stores the source operand on the top of the stack.

PUSHA/PUSHAD pushes the contents of the general-purpose registers onto the stack.

PUSHF/PUSHFD pushes EFLAGS register onto the stack.

 

5. POP, POPA/POPAD

POP instruction loads the value from the top of the stack to the location specified with the destination operand (or explicit opcode) and then increments the stack pointer. The destination operand can be a general-purpose register, memory location, or segment register.

POPAD instruction pops doublewords and POPA pops words from the stack into the general-purpose registers. The registers are loaded in the following order: EDI, ESI, EBP, EBX, EDX, ECX, and EAX (if the operand-size attribute is 32) and DI, SI, BP, BX, DX, CX, and AX (if the operand-size attribute is 16). (These instructions reverse the operation of the PUSHA/PUSHAD instructions.) The value on the stack for the ESP or SP register is ignored. Instead, the ESP or SP register is incremented after each register is loaded.

All descriptions of commands is taken from "Intel® 64 and IA-32 Architectures Software Developer’s Manual, Volumes 2A, 2B & 2C", please check it for more details.